CMOS image sensors can be integrated with all kinds of functional circuitry and blocks in a single chip. A digital imager typically can include a photodiode array, column readout structure, A/D conversion, and digital controllers (or processors) on single or multiple substrates. Conventional back-side illuminated (BSI) imager can divide the photodiode and circuitry into different strata, providing photons to the photodiodes directly from the other side of the substrate. FIG. 1 depicts conventional four-side buttable BSI imager 100 using multiple layers of chips stacked in a three-dimensional (3D) package. On a first layer, the 3D BSI imager includes imaging sensor array 110 with pixels containing photodiodes that are exposed to incident light. Traces 120 route the pixel output(s) to layers of silicon stack 130. The silicon stack can include top and bottom aluminum nitride substrates 132, 133. Between the AIN caps can be rerouting interposer 134 along with analog-digital converter (ADC) master control chip 136 and ADC slave control chip 137. System interface 140 can be connected to BSI imager 100 via spring-loaded (POGO) pins 145.
In some implementations, a buttable sub-imager can be a building block for an X-ray detector used in, for instance, medical diagnostic equipment. An X-ray detector based on a buttable sub-imager can typically require up to hundreds of sub-imagers to obtain an image from a region of interest. This quantity of sub-imagers can have a large amount of digital input/output (I/O) control lines with a massive amount of digital data being obtained in parallel to achieve fast frame rate (e.g., 100 frames/second). The address and control of sub-imagers and their readout data is needed for better image processing.